Over the past several decades, semiconductor-driven technologies have grown exponentially and have revolutionized our society. Manufacturers of semiconductors have made vast improvements in production, resulting in improved end product quality, speed, and performance. However, there continues to be demand for faster, more reliable, and higher performing semiconductors. To assist with these demands, better inspection systems and methods are continuously being sought.
For reference, semiconductors are often manufactured in wafer format, with each wafer including a series of layers, including, for example, a silicon and insulator layer or layers in a silicon-on-insulator or SOI wafer. Regardless, during wafer production, masking layers or resist layers are often times applied to a wafer in order to facilitate wafer patterning. Typically, a desired amount of liquid resist is applied to a top surface of a wafer while the wafer is being rotated. As the wafer is rotated, the resist material spreads outward radially from the center of the wafer and toward the semiconductor edge such that the wafer is substantially coated with a circular layer of resist. Excess amounts of resist can accumulate and form a mound or bead of resist toward an outer edge of the semiconductor wafer. At times, the resist also flows over the wafer edge, which can contaminate an edge normal and a backside of the wafer. Various edge bead removal (EBR) processes are applied in order to eliminate the “edge bead” of resist and/or other unwanted material proximate the wafer edge.
It is also noted that during wafer production, various material removal processes are employed, including, for example, wet etches, a dry etches, polishing, chemical mechanical polishing (CMP), and others depending on the materials being removed. During EBR removal, for example, chemical EBR units remove a ring of resist and other unwanted material about the edge of the wafer by dispensing a solvent referred to as EBR fluid, onto the resist of the semiconductor wafer. The solvent dissolves or develops away the resist and allows for easy removal of the resist from the edge of the semiconductor wafer. Wafer edge exposure (WEE) units can be additionally or alternatively applied for EBR purposes. WEE utilizes an optical unit to expose a ring of resist at or near the edge of the semiconductor wafer to light. During subsequent development processes, the exposed ring of resist is removed.
Variability or other problems with material removal processes, for example, can give rise to various concerns. For example, if the wafer is not centered during EBR, the ring of resist removed from the wafer edge will not be centered relative to the wafer. Thus, the remaining layer of resist will be offset on the wafer. This can result in defects in the integrated circuit devices formed proximate the wafer edges, for example. As another example, unevenly stacked substrate layers can result due to such offset, with substrate layer material being lifted and detrimentally re-deposited onto the semiconductor wafer. The re-deposited substrate material can contaminate the semiconductor wafer and cause defects in the integrated circuit devices formed on the wafer.